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XE1205
5.4
FREQUENCY SYNTHESIZER
The Frequency Synthesizer generates the local oscillator (LO) signal for the receiver section as well as the continuous
phase FSK (CPFSK) modulated signal for the transmitter section. The core of the synthesizer is implemented with a
Sigma-Delta PLL architecture. The frequency is programmable with a step-size of 500 Hz in the 433, 868 and 915 MHz
frequency bands. This block includes a crystal oscillator which provides the frequency reference for the PLL. This
reference frequency can also be used as a reference clock for the external microcontroller on the CLKOUT pin.
5.4.1
Clock Output for an external processor
A reference clock can be generated for use by an external microcontroller. The OSCParam_Clkout configuration bit
controls the CLKOUT pin. When set to high, CLKOUT is enabled, otherwise it is disabled. The output frequency at
CLKOUT is defined by the value of the OSCParam_Clkout_freq(2:0) parameter. The output frequency at CLKOUT is the
reference oscillator frequency divided by 2, 4, 8, 16 or 32. With a reference oscillator frequency of 39 MHz this provides
a reference clock at 19.5 MHz, 9.75 MHz, 4.87 MHz, 2.44 MHz or 1.22 MHz, respectively.
This clock signal is disabled in Sleep Mode.
? Semtech 2008
21
www.semtech.com
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